Sdram Refresh; Sdram Initialization And Commands; Table 69: Commands That Can Be Issued Through Mc_Dramcmd Register - Broadcom BCM1250 User Manual

BCM1250/BCM1125/BCM1125H
SDRAM R
EFRESH
The memory controller uses the SDRAM auto-refresh command to refresh the memory during normal
operation. The refresh interval for a channel is set (in memory clocks) in the mc_clock_cfg register. In parts
where the system_revision indicates PERIPH_REV3 or later this register also has fields to completely disable
refresh (useful only during debugging, to avoid the scope being triggered by refresh cycles) or disable refresh
for particular (i.e. unused) chip selects.
Software can cause Auto Refresh commands to be sent to the SDRAM as described in
Initialization and Commands" on page
SDRAM I
NITIALIZATION AND
The DDR SDRAMs accept a number of commands that are not used as part of regular operation. These can
be issued under software control by writing the mc_dramcmd register with the command to be performed and
the chip selects that should be asserted when the command is executed. The memory controller will insert a
synchronization point before the command is executed so that all buffers are empty. In some cases the
commands require additional data encoded in the address lines. The mc_drammode register holds the data
to be encoded (on address lines A[11:0] for standard DDR parts and A[14:0] for FCRAMs).

Table 69: Commands that can be Issued Through mc_dramcmd Register

Name Command
EMRS Write Extended Mode Register Write the value in the mc_drammode register to the Extended Mode Register
MRS Write Mode Register
PRE Precharge all banks
AR Auto Refresh
SREF_set Enter Self Refresh mode
SREF_clr Exit Self Refresh mode
PDN_set Enter Power Down mode
PDN_clr Exit Power Down mode
Page 126 Section 6: DRAM
126. This has no effect on the refresh interval counter.
C
OMMANDS
in the selected parts.
Write the value in the mc_drammode register to the Mode Register in the
selected parts.
Issue a precharge command to the SDRAMs with address bit 10 high to
cause all banks to be precharged. If the pre_on_8 bit is set then this
command will run the precharge command with address bit 8 high.
Issue an Auto Refresh command to the SDRAMs.
Set the SDRAM into Self Refresh mode by issuing a Self Refresh command
and deasserting CKE then stopping the clock.
Remove the SDRAM from Self Refresh mode by starting the clock, asserting
CKE and issuing NOP commands to the part. Software must ensure that the
memory is not accessed for the required time after the part is removed from
Self Refresh mode (normally 200 memory clocks).
Set the SDRAM into Power Down mode by issuing a NOP command and
deasserting CKE.
Remove the SDRAM from Power Down mode by asserting CKE and issuing
NOP commands to the part. Software must ensure that the memory is not
accessed for the required time after the part is removed from Power Down.
B r oadco m C orp or ati on
Description
Document 1250_1125-UM100CB-R
User Manual
10/21/02
Section: "SDRAM