Table 125: Error Routing Registers - Broadcom BCM1250 User Manual

User Manual
10/21/02
10.1.7 Response Errors
10.2.1 Error Responses
10.2.2 Error Interrupts
10.2.2 Error Routing CSRs
Error Type
Protocol
Overflow
EOC
Inbound EOC
(covers more than
Spec)
Response
CRC
SERR
11.1 Clocking Mode Definition
12 Reset and Initialization
Document 1250_1125-UM100CB-R
A response received without a matching source tag (or as a result of a response to a WrSized
request) is reported as a SrcTagError in the HyperTransport Error Status Register
(Table 153 on page 254) and controlled in the HyperTransport Error Control Register
(Table 152 on page 253).
No check is done for a TgtDone response or an incorrect count received for a RdSized request,
the requester will receive UNPREDICTABLE data in this case.
The interface does not generate Flush or Atomic Read-Modify-Write cycles.
Error responses are controlled by the Master Abort Mode bit as the specification describes. Bit
5 of Table 146 describes the method used to propageate errors from the HyperTransport fabric
to the ZBbus.
The error interrupts are passed directly to the interrupt mapper as interrupt numbers 48 and 49.
The error CSR bits in the implementation are summarised in the
which follows the format of the Table 50 in the HyperTransport Specification.

Table 125: Error Routing Registers

Log Bit Flood Enable
ErrStat/ProtoErr
ProtSyncFlood
ErrStat/OvfErr
OvfSyncFlood
ErrStat/
EocNXAErr EocNxaSyncFlood
ErrStat/
EocNXAErr EocNxaSyncFlood
ErrStat/
SrcTagErr SrcTagSyncFlood
LinkCtrl/ CrcErr
CrcFloodEn
SecStatus/ BridgeCtrl/
SerrDet
The interface supports synchronous and asynchronous mode. Software must configure the
interface before setting the SipReady bit, as described in the
HyperTransport Interface" on page
The interface performs the standard link initialization after software has configured the low level
parameters and set the SipReady bit.
B r oadco m C orp or ati on
BCM1250/BCM1125/BCM1125H
Fatal Error Enable
ErrCtrl/ ErrCtrl/
ProtFatalEn
ErrCtrl/ ErrCtrl/
OvfFatalEn
ErrCtrl/ ErrCtrl/
EocNxaFatalEn
ErrCtrl/ ErrCtrl/
EocNxaFatalEn
ErrCtrl/ ErrCtrl/
SrcTagFatalEn
LinkCtrl/ ErrCtrl/
CrcFatalEn
ErrCtrl/
SerrEn SerrFatalEn
256.
Section 8: PCI Bus and HyperTransport Fabric Page
Table 125 on page 229
Nonfatal Error Enable
ErrCtrl/
ProtNonFatalEn
ErrCtrl/
OvfNonFatalEn
ErrCtrl/
EocNxaNonFatalEn
ErrCtrl/
EocNxaNonFatalEn
ErrCtrl/
SrcTagNonFatalEn
ErrCtrl/
CrcNonFatalEn
Not Supported
"System Reset Initialization of the
below
229