Table 7: Operation Of Different Reset Sources; Table 8: Static Configuration Options - Broadcom BCM1250 User Manual

User Manual
10/21/02
Table 7 summarizes the reset options.
Sample pll_div bits
Restart PLL
Clear system_cfg[63]
Sample configuration
bits (other than pll_div)
Assert RESETOUT_L
Reset ZBbus
Reset Agents
During reset pull-up and pull-down resistors on the generic Address/Data bus are used to set static system
options. These pins have weak internal pull-up or pull-down resistors (as described in the Hardware Data
Sheet), external resistors are required to set the other state. These options change the behavior of pins that
need to be active at startup time to ensure proper operation.
IO_AD
Name
Bit
0 Reserved
1 clk100_src
2 ldt_minrstcnt
3 ldt_bypass_pll
4 pci_test_mode
5 iob0_div
6 iob1_div
11:7 pll_div
Document 1250_1125-UM100CB-R

Table 7: Operation of Different Reset Sources

Software
COLDRES_L
System Reset
pin asserted
system_cfg[60]
Y -
Y Y
Y Y
Y Y
Y Y

Table 8: Static Configuration Options

Pulled Up to 3.3V
Reserved
The internal 100MHz clock and
IO_CLK100 come directly from
the CLK100_p reference. The
IO_CLK100 will have a duty
cycle only a little worse than the
reference clock.
Broadcom Use Only.
Enable HyperTransport reset
test mode.
Broadcom Use Only.
Bypass the HyperTransport PLL.
Broadcom Use Only.
Enable PCI test mode.
IOB0 clock is CPU clock/3
Use with slow CPU clocks.
IOB1 clock is CPU clock/2
Use with slow CPU clocks.
These bits are used to set the PLL clock ratios
B r oadco m C orp or ati on
BCM1250/BCM1125/BCM1125H
Watchdog RESET_L
2nd time-out
pin
Type=system asserted
- -
- -
Y Y
Y Y
Y Y
Pulled Down
Normal Operation.
The internal 100MHz clock
and IO_CLK100 are
generated by dividing down
the output of the PLL that
feeds the CPU clock. The
IO_CLK100 will match the
internal clocking and will run
at a few MHz (typically less
than 10MHz) during
COLDRES_L.
Normal Operation.
Normal Operation.
Normal Operation.
IOB0 clock is CPU clock/4
Use with fast CPU clocks.
IOB1 clock is CPU clock/3
Use with fast CPU clocks.
Section 3: System Overview
Watchdog
Software
2nd Time-
Soft Reset
out
system_cfg[58]
Type=sbsoft
- -
- -
- -
Y Y
Y Y
Section
N/A
Section: "Clocks" on
page 31
N/A
N/A
N/A
Section: "Clocks" on
page 31
Section: "Clocks" on
page 31
Section: "Clocks" on
page 31
Page 27