Broadcom BCM1250 User Manual page 504

BCM1250/BCM1125/BCM1125H
Name
io_ext_time_cfg0_7
io_ext_time_cfg1_0
io_ext_time_cfg1_1
io_ext_time_cfg1_2
io_ext_time_cfg1_3
io_ext_time_cfg1_4
io_ext_time_cfg1_5
io_ext_time_cfg1_6
io_ext_time_cfg1_7
io_interrupt_status
io_interrupt_data0
io_interrupt_data1
io_interrupt_data2
io_interrupt_data3
io_interrupt_addr0
io_interrupt_addr1
io_interrupt_parity
pcmcia_cfg
pcmcia_status
gpio_clr_edge
gpio_int_type
gpio_input_invert
gpio_glitch
gpio_read
gpio_direction
gpio_pin_clr
gpio_pin_set
mac_tx_byte_0
mac_collisions_0
mac_late_col_0
mac_ex_col_0
mac_fcs_error_0
mac_tx_abort_0
mac_tx_bad_0
Page 476 Section 16: Reference
Table 312: Internal Registers Ordered by Address
Table/
Address
Page
254/376
00_1006_1638
255/377
00_1006_1700
255/377
00_1006_1708
255/377
00_1006_1710
255/377
00_1006_1718
255/377
00_1006_1720
255/377
00_1006_1728
255/377
00_1006_1730
255/377
00_1006_1738
256/377
00_1006_1a00
257/378
00_1006_1a10
258/378
00_1006_1a18
259/378
00_1006_1a20
260/378
00_1006_1a28
261/379
00_1006_1a30
262/379
00_1006_1a40
263/379
00_1006_1a50
273/394
00_1006_1a60
274/395
00_1006_1a70
276/399
00_1006_1a80
277/399
00_1006_1a88
279/399
00_1006_1a90
280/400
00_1006_1a98
278/399
00_1006_1aa0
281/400
00_1006_1aa8
282/400
00_1006_1ab0
283/400
00_1006_1ab8
167/289
00_1006_4000
167/289
00_1006_4008
167/289
00_1006_4010
167/289
00_1006_4018
167/289
00_1006_4020
167/289
00_1006_4028
167/289
00_1006_4038
B r oadco m C orp or ati on
(Cont.)
Description
cs7 Timing parameter configuration 0.
cs0 Timing parameter configuration 1.
cs1 Timing parameter configuration 1.
cs2 Timing parameter configuration 1.
cs3 Timing parameter configuration 1.
cs4 Timing parameter configuration 1.
cs5 Timing parameter configuration 1.
cs6 Timing parameter configuration 1.
cs7 Timing parameter configuration 1.
Interrupt status for generic bus sources (Read Only, read
clears).
Data latched on generic interrupt assertion (Read Only).
Data latched on generic interrupt assertion (Read Only).
Data latched on generic interrupt assertion (Read Only).
Data latched on generic interrupt assertion (Read Only).
Address latched on generic interrupt assertion (Read
Only).
Address latched on generic interrupt assertion (Read
Only).
Parity latched on generic interrupt assertion (Read Only).
PCICMA controller configuration.
PCMCIA controller status (Read Only, read clears
interrupt).
Write a 1 to clear the edge detector for that bit (Write Only).
Select interrupt type for pairs of pins.
Set to invert the input.
Set for 1ms glitch filter, clear for 60 ns.
Shows current value of signal after possible invert and
glitch (Read Only).
GPIO pin data direction. 1 for output, 0 for input.
Write 1 to set that bit to zero (Write Only).
Write 1 to set that bit to one (Write Only).
RMON transmit byte counter.
RMON total collisions.
RMON late collisions.
RMON excessive collisions.
RMON packets Tx with bad FCS.
RMON transmit packets aborted.
RMON total of bad Tx packets.
User Manual
10/21/02
Document 1250_1125-UM100CB-R