Broadcom BCM1250 User Manual page 25

User Manual BCM1250/BCM1125/BCM1125H
10/21/02
Table 208: DUART Input Port Change Status Register for Channel A ......................................................... 331
Table 209: DUART Input Port Change Status Register for Channel B ......................................................... 331
Table 210: DUART Output Port Control Register.......................................................................................... 331
Table 211: DUART Per Channel Output Control Registers........................................................................... 332
Table 212: DUART Aux Control Register ...................................................................................................... 332
Table 213: DUART Per Channel Aux Control Registers ............................................................................... 332
Table 214: DUART Interrupt Status Register ................................................................................................ 333
Table 215: DUART Channel A Only Interrupt Status Register ...................................................................... 333
Table 216: DUART Channel B Only Interrupt Status Register ...................................................................... 333
Table 217: DUART Interrupt Mask Register .................................................................................................. 334
Table 218: DUART Channel A Only Interrupt Mask Register........................................................................ 334
Table 219: DUART Channel B Only Interrupt Mask Register........................................................................ 334
Table 220: DUART Output Port Set Register ................................................................................................ 335
Table 221: DUART Output Port Clear Register ............................................................................................. 335
Table 222: DUART Output Port RTS Register .............................................................................................. 335
Table 223: Synchronous Serial Interface Signal Names ............................................................................... 339
Table 224: Synchronous Serial Interface GPIO Pins .................................................................................... 339
Table 225: Sequencer Table Entries ............................................................................................................. 341
Table 226: HDLC Frame Structure............................................................................................................... 344
Table 227: Option Flags for Synchronous Serial Transmit Channel ............................................................. 345
Table 228: Status Flags for Synchronous Serial Receive Channel............................................................... 349
Table 229: Recommended Line Interface Settings for Loopback Mode 2..................................................... 353
Table 230: RMON Counters .......................................................................................................................... 353
Table 231: Serial Mode Configuration Register............................................................................................. 354
Table 232: Synchronous Serial Clock Source and Line Interface Mode Register ......................................... 354
Table 233: Synchronous Serial Command Register (Write-only) .................................................................. 355
Table 234: Serial Write Threshold Register................................................................................................... 356
Table 235: Serial Transmit Read Threshold Register ................................................................................... 356
Table 236: Serial Receive Read Threshold Register .................................................................................... 356
Table 237: Serial Minimum Frame Size Register .......................................................................................... 356
Table 238: Serial Maximum Frame Size Register ......................................................................................... 357
Table 239: Serial DMA Enable Registers ...................................................................................................... 357
Table 240: Synchronous Serial Status Register............................................................................................ 357
Table 241: Serial Status Debug Register ...................................................................................................... 358
Table 242: Serial Interrupt Mask Register ..................................................................................................... 358
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