User Manual
10/21/02
The interrupt_trace register is used to select which interrupts to this CPU are sent to the trace unit to be used
as part of a trigger condition. The bits in this register provide an accept mask. Any interrupt that has its
corresponding bit set in this register will cause the trigger.
mbox_clr_cpu_x (64 bits)
mbox_set_cpu_x (64 bits)
ht interrupt decode logic (expands to set one of the 128 bits)
mailbox_cpu_x (64 bits)
system sources
interrupt_trace_x (64 bits)
Document
1250_1125-UM100CB-R
interrupt_ldt_clr_x (64 bits)
interrupt_ldt_set (64 bits)
(same location for all mappers)
interrupt_ldt_x (64 bits)
4
64
64
Figure 10: Per-CPU Interrupt Mapper (replicated for each CPU; x = 0 or 1)
B r oadco m C orp or ati on
BCM1250/BCM1125/BCM1125H
interrupt_diag_x (64 bits)
64
64
Map Registers
O
interrupt_status_0_x (64 bits)
0
each input
is linked to
64
O
interrupt_status_1_x (64 bits)
one output
1
64
O
interrupt_status_2_x (64 bits)
2
64
64
O
interrupt_status_3_x (64 bits)
3
In
64
O
interrupt_status_4_x (64 bits)
4
64
O
interrupt_status_5_x (64 bits)
5
64
O
interrupt_status_6_x (64 bits)
6
64
O
interrupt_status_7_x (64 bits)
7
trace_seq_debug_cpu_x
Section 4: System Control and Debug Unit
interrupt_mask_x (64 bits)
64
64
64
64
64
64
64
64
64
64
int_trace_trigger_x
INT 0
INT 1
INT 2
INT 3
INT 4
INT 5
NMI
DINT
Page
51
Need help?
Do you have a question about the BCM1250 and is the answer not in the manual?