Table 185: Mac Interrupt Mask Registers; Table 186: Mac Fifo Pointer Registers; Table 187: Mac Receive Address Filter Exact Match Registers - Broadcom BCM1250 User Manual

User Manual
10/21/02
Bits Name Default
46:0 mask 47'b0
47 split_en 1'b0
63:48 reserved 19'b0
Bits Name Default
63:0 status 64'hx
mac_addr0_0 - 00_1006_4280 mac_addr0_1 - 00_1006_5280 mac_addr0_2 - 00_1006_6280
mac_addr1_0 - 00_1006_4288 mac_addr1_1 - 00_1006_5288 mac_addr1_2 - 00_1006_6288
mac_addr2_0 - 00_1006_4290 mac_addr2_1 - 00_1006_5290 mac_addr2_2 - 00_1006_6290
mac_addr3_0 - 00_1006_4298 mac_addr3_1 - 00_1006_5298 mac_addr3_2 - 00_1006_6298
mac_addr4_0 - 00_1006_42A0 mac_addr4_1 - 00_1006_52A0 mac_addr4_2 - 00_1006_62A0
mac_addr5_0 - 00_1006_42A8 mac_addr5_1 - 00_1006_52A8 mac_addr5_2 - 00_1006_62A8
mac_addr6_0 - 00_1006_42B0 mac_addr6_1 - 00_1006_52B0 mac_addr6_2 - 00_1006_62B0
mac_addr7_0 - 00_1006_42B8 mac_addr7_1 - 00_1006_52B8 mac_addr7_2 - 00_1006_62B8
Bits Name Default
47:0 address 48'bx
63:48 zero 16'b0
Document 1250_1125-UM100CB-R

Table 185: MAC Interrupt Mask Registers

mac_int_mask_0 - 00_1006_4410
mac_int_mask_1 - 00_1006_5410
mac_int_mask_2 - 00_1006_6410
This register is used in both Ethernet and Packet FIFO modes
Setting a bit in this register enables generation of an interrupt when the corresponding bit
is set in the mac_status register.
When this bit is set the channel 1 interrupts will be signalled on the channel 1 interrupt
instead of standard interrupt, and reads to the mac_status register will not clear channel
1 state. When this bit is clear all interrupts are signalled on the standard interrupt and
reading the mac_status register clears all state.
Reserved

Table 186: MAC FIFO Pointer Registers

mac_rx_fifo_ptrs_0 - 00_1006_4120
mac_rx_fifo_ptrs_1 - 00_1006_5120
mac_rx_fifo_ptrs_2 - 00_1006_6120
mac_tx_fifo_ptrs_0 - 00_1006_4128
mac_tx_fifo_ptrs_1 - 00_1006_5128
mac_tx_fifo_ptrs_2 - 00_1006_6128
READ ONLY - Broadcom Use Only
This register is used in both Ethernet and Packet FIFO modes
Status for fifo and counts (Broadcom Use Only)

Table 187: MAC Receive Address Filter Exact Match Registers

This register is used in both Ethernet and Packet FIFO modes
The destination address to be exactly matched as part of input packet filtering. The
incoming address is always compared to all entries. The low byte in this register
corresponds with the first byte of the address to be received.
Reads as zero, writes ignored.
B r oadco m C orp or ati on
BCM1250/BCM1125/BCM1125H
Description
Description
Description
Section 9: Ethernet MACs Page 313