BCM1250/BCM1125/BCM1125H
An external debugger connected to the JTAG probe can use both master and slave accesses to communicate
with the part. An example flow is shown in
and service CPU requests. When it needs to run an access (for example to read memory) it will scan in the
Control Register with the MaSl bit set. A check needs to be done for CPU accesses that may have arrived while
the mode was being changed, once they are serviced the interface is ready for the master access.
Page
436
Section 15: JTAG and Debug
Y
Need JTAG
to ZBbus?
N
Scan Out
EJTAG Control Register
N
PrAcc Bit = 1?
Y
Service
CPU Access
Figure 88: Example JTAG Probe Flowchart
B r oadco m C orp or ati on
Scan In/Out
EJTAG Control Register
With MaSl = 1
PrAcc Bit = 1?
Y
Service
CPU Access
Run JTAG
Bus Cycle
More JTAG
Y
Cycles Needed?
N
Scan In/Out
EJTAG Control Register
with MaSl=0
Figure
88. Normally the debugger will scan out the Control Register
User Manual
10/21/02
N
Scan Out
EJTAG Control Register
Y
PrAcc Bit = 1
N
Document
1250_1125-UM100CB-R
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