Data Phase; Table 5: Zbbus Byte Lane Assignments; Table 6: Zbbus Data Status Codes - Broadcom BCM1250 User Manual

BCM1250/BCM1125/BCM1125H
D P
ATA HASE
The data transfer ends a transaction, and takes place in the Data phase. Since the latency between the A-
phase request and the data becoming available can be very long, the D-phase is completely decoupled from
the A-phase. The transaction ID is used to tie the data to the corresponding request. An agent must always be
prepared to accept the data; it must not issue a read command unless it has space to accept the read-data-
return, and it must block all writes when its receive buffers are full.
The D-phase takes place on the data section of ZBbus. A separate fair arbiter is used to get control of the data
lines. The D-phase must always follow the A-phase, so agents are not permitted to arbitrate for the data bus
until they have been granted the address bus. The data bus signals, shown in
being sent (data smaller than a block is sent on its natural byte lanes) and status information.
The byte lanes that data uses on the ZBbus depends on the system endian mode. When viewed as 64 bit
double-words there is no change (i.e. address bits [4:3] always select which 64 bit section of the ZBbus is
used), but the byte address within the 64 bit double-words is swapped when the endian mode changes.
shows the mapping from byte address to data bits and byte enables.
2 2 2 2 2 2 2 2 2 2
Data
5-4 4-4 3-3 3-2 2-1
bits
5 8 7 0 9 2 1 4 3 6
Byte 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
Enable
Big 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F
Endian
Addr[4:0]
(hex)
Little
07 06 05 04 03 02 01 00 0F 0E 0D 0C 0B 0A 09 08 17 16 15 14 13 12 11 10 1F 1E 1D 1C 1B 1A 19 18
Endian
Addr[4:0]
(hex)
The D_CODE indicates the status of the data being transferred as shown in
D_CODE[2:0]
000 NOP, data invalid (gets counted as arbitrated but
not used). This is used if an agent was granted
the data bus but some exception causes it to be
unable to supply the data.
001 Data valid.
010 Data valid, tag was corrected for ECC error.
011 Data valid, data was corrected for ECC error.
Page 24 Section 3: System Overview
Table 5. ZBbus Byte Lane Assignments
2 2 2 2 1 1 1 1 1 1 1 1 1 1 1 1
1-0 0-0 9-9 9-8 8-7 7-6 6-6 5-5
5 8 7 0 9 2 1 4 3 6 5 8 7 0 9 2

Table 6: ZBbus Data Status Codes

Status of Data on D_DA
B r oadco m C orp or ati on
1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0
5-4 4-3 3-2 2-2 1-1 1-0 0-9 9-8
1 4 3 6 5 8 7 0 9 2 1 4 3 6 5 8
All agents can generate NOPs.
All agents can generate valid data.
L2 Cache: Tag ECC corrected.
CPU: Data cache had correctable error.
Memory Controller: Data ECC corrected.
L2 Cache: Data ECC corrected.
User Manual
Table 2, include the actual data
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
8-8 7-7 7-6 6-5 5-4 4-4 3-3 3-2
7 0 9 2 1 4 3 6 5 8 7 0 9 2 1 4
Table 6.
Sources of Error
Document 1250_1125-UM100CB-R
10/21/02
Table 5
0 0 0 0 0 0
2-1 1-0 0-0
3 6 5 8 7 0