Table Of Contents - Broadcom BCM1250 User Manual

User Manual
10/21/02
Section 1: Introduction........................................................................................................ 1
The SiByte Broadband Processor Family.................................................................................................. 1
The BCM1250................................................................................................................................................ 2
The BCM1125 and BCM1125H .................................................................................................................... 3
Audience ....................................................................................................................................................... 3
Other Documentation .................................................................................................................................. 4
Terminology.................................................................................................................................................. 5
Section 2: Signal Overview ................................................................................................. 7
BCM1250 Signal Groups ............................................................................................................................. 7
BCM1125/H Signal Groups .......................................................................................................................... 8
Section 3: System Overview ............................................................................................... 9
Introduction .................................................................................................................................................. 9
Internal Registers ....................................................................................................................................... 11
Coherence................................................................................................................................................... 12
Ordering Rules and Device Drivers .......................................................................................................... 14
CPU Speculative Execution ...................................................................................................................... 16
Error Conditions......................................................................................................................................... 17
Cache Error Exceptions ........................................................................................................................ 17
Bus Error Exceptions ............................................................................................................................ 18
CPU to CPU Communication (BCM1250 Only) ........................................................................................ 19
External Interrupts ..................................................................................................................................... 19
Overview of the ZBbus Protocol............................................................................................................... 20
Arbitration.............................................................................................................................................. 21
Address Phase...................................................................................................................................... 22
Response Phase................................................................................................................................... 23
Data Phase ........................................................................................................................................... 24
Reset ........................................................................................................................................................... 26
Clocks ......................................................................................................................................................... 31
Memory Map ............................................................................................................................................... 34
Section 4: System Control and Debug Unit..................................................................... 41
Introduction ................................................................................................................................................ 41
Document 1250_1125-UM100CB-R
T C
ABLE OF ONTENTS
B roa dcom Co rpo rat ion
BCM1250/BCM1125/BCM1125H
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