Typical Uart Receive Operation - Mitsubishi Electric M32R Series User Manual

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12.7.4 Typical UART Receive Operation

The following shows a typical receive operation in UART mode.
<UART on receive side>
Receive enable bit
(SIO Receive
Control Register)
Receive status bit
Receive-finished bit
SIO receive interrupt
(Note 1)
(When receive-finished
interrupt is selected)
(When receive error
interrupt is selected)
Note 1 : Change of the Interrupt Controller "SIO Receive Interrupt Control Register" interrupt request bit
Note 2 : When receive-finished interrupt is enabled (DMA transfer can also be requested at the same
timing)
Note 3 : The Interrupt Controller IVECT register is read or "SIO Receive Interrupt Control Register"
interrupt request bit cleared
Figure 12.7.3 Example of UART Reception (When Received Normally)
<UART on receive side>
RXD
Internal clock selected
Set
RXD
: Processing by software
12.7 Receive Operation in UART Mode
<UART on transmit side>
TXD
ST D7 D6 D0 PAR SP
Receive-finished interrupt
No interrupt request
: Interrupt generation
12-59
SERIAL I/O
Cleared
SP
Automatically
cleared for each
receive operation
performed
Read from receive buffer
(Note 2)
Interrupt request accepted
(Note 3)
Ver.0.10