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13
Synchronization
Segment
•
Shown in this diagram is the bit timing for cases where one bit consists of 8 Tq's.
•
When one-time sampling is selected, the value sampled at Sampling Point (1) is assumed to
be the value of the bit.
•
When three-time sampling is selected, the value of the bit is determined by majority from
CAN bus values sampled at Sampling Points (1), (2), and (3).
Figure 13.4.1 Example of Bit Timing
Setting the number of times sampled
Select the number of times the CAN bus is sampled from "one time" and "three times."
• When you select one-time sampling, the value sampled at the end of Phase Segment1
is assumed to be the value of the bit.
• When you select three-time sampling, the value of the bit is determined by majority
from values sampled at three points, i.e., the value sampled at the first point and those
sampled one Tq before and two Tq's before that.
(5) Setting ID Mask Registers
Set the values of ID Mask Registers (Global Mask Register, Local Mask Register A, and
Local Mask Register B) which are used in acceptance filtering of received messages.
(6) Settings when running in BasicCAN mode
• Set the CAN Extended ID Register IDE14 and IDE15 bits. (We recommend setting the
same value in these bits.)
• Set IDs for message slots 14 and 15.
• Set the Message Control Registers 14 and 15 for data frame reception (H'40).
(7) Setting CAN module operation mode
Using the CAN Control Register (CAN0CNT), select the CAN module's operation mode
(BasicCAN or loopback mode) and the clock source for the time stamp counter.
(8) Releasing the CAN module from reset
After you finished settings (1) through (7) above, clear the CAN Control Register
(CAN0CNT)'s forcible reset bit (FRST) and reset bit (RST) to 0. Then, after detecting 11
consecutive "recessive" bits on the CAN bus, the CAN module becomes ready to
communicate.
1 Bit Rate
Propagation Segment
13-57
13.4 Initializing the CAN Module
Phase Segment1
1Tq
(3)
(2)
Sampling Point
CAN MODULE
Phase Segment2
(1)
Ver.0.10
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