Operation Of Wrr (Ram Content Forcible Rewrite) - Mitsubishi Electric M32R Series User Manual

Mitsubishi 32-bit risc single-chip microcomputers

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14.3.3 Operation of WRR (RAM Content Forcible Rewrite)

When the WRR (RAM content forcible rewrite) command is issued, the RTD forcibly rewrites the

contents of the internal RAM without causing the CPU's internal bus to stop. Because the RTD

writes data to the internal RAM while no transfers are being performed between the CPU and

internal RAM, no extra load is levied on the CPU.

The address to be read from the internal RAM can only be specified on 32-bit word boundaries.

(The two low-order address bits specified by a command are ignored.) Note also that data are

written to the internal RAM in units of 32 bits.

The external host should transmit the command and address in the first frame and then the write

data in the second frame. The timing at which the RTD writes to the internal RAM occurs in the third

frame after receiving the write data.

a) First frame

b) Second frame

Note 1: X = Don't Care (However, if issued immediately after the RCV command, bits 20-31 must all be

Note 2 : The specified address and write data are transferred LSB-first.

Figure 14.3.4 WRR Command Data Format

Command (WRR)

REAL-TIME DEBUGGER (RTD)

14.3 Functional Description of the RTD

• • • • • • • • • • • • • • • • • •

Write data (Note)

Specified address