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12
Y (Successive
transmission)
Note : This applies when transmit interrupt has been enabled by SIO Interrupt Mask Register.
Figure 12.6.4 Transmit Operation during UART Mode (Hardware Processing)
The following processing is
automatically executed in hardware
UART transmit
operation starts
Transmit
conditions
met?
Y
• Transfer content of transmit buffer to
transmit shift register
• Set transmit buffer empty bit to 1
Transmit data
Transmit
conditions
met?
N
Clear transmit status bit to 0
UART transmit
operation completed
12-52
12.6 Transmit Operation in UART Mode
N
Transmit interrupt
SERIAL I/O
(Note)
request
Transmit DMA
transfer request
Ver.0.10
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