9
(6) Transfer byte positions
When the transfer unit = 8 bits, the LSB of the address register is effective for both source and
destination. (Therefore, in addition to data transfers between even addresses or between odd
addresses, data may be transferred from even address to odd address, or from odd address to
even address.)
When the transfer unit = 8 bits, the LSB of the address register (D15 of the address register) is
ignored, and data are always transferred in two bytes aligned to the 16-bit bus.
The diagram below shows the valid transfer byte positions.
Source
Destination
Figure 9.3.3 Transfer Byte Positions
<When transfer unit = 8 bits>
+
+
0
1
D0
D7 D8
8 bits
8 bits
8 bits
8 bits
9-35
9.3 Functional Description of the DMAC
<When transfer unit = 16 bits>
+
0
D15
D0
DMAC
+
1
D7 D8
D15
16 bits
16 bits
Ver.0.10