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10
TCLK3
TCLK3S
TIN12
TIN12S
TIN13
TIN13S
TIN14
TIN14S
TIN15
TIN15S
TIN16S
TIN16
TIN17
TIN17S
TIN18
TIN18S
TIN19
TIN19S
Figure 10.5.1 Block Diagram of TMS (Input-related 16-bit Timer)
Clock bus Input event bus
3 2 1 0 3 2 1 0
S
IRQ10
S
IRQ10
DRQ3
IRQ10
IRQ10
S
IRQ10
S
IRQ10
DRQ5
IRQ10
DRQ6
IRQ10
3 2 1 0
3 2 1 0
S
: Selector
10-141
MULTIJUNCTION TIMERS
10.5 TMS (Input-related 16-bit Timer)
TMS 0
clk
Counter
Measure register 3
(16 bits)
Measure register 2
Measure register 1
Measure register 0
cap3
cap2
cap1
S
S
S
clk
TMS 1
cap3
cap2
cap1
S
S
S
Output event bus
0 1 2 3
IRQ7
ovf
cap0
IRQ7
ovf
cap0
0 1 2 3
Ver.0.10
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