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12
12.2.8 SIO Baud Rate Registers
SIO0 Baud Rate Register (S0BAUR)
SIO1 Baud Rate Register (S1BAUR)
SIO2 Baud Rate Register (S2BAUR)
SIO3 Baud Rate Register (S3BAUR)
SIO4 Baud Rate Register (S4BAUR)
SIO5 Baud Rate Register (S5BAUR)
D8
D
Bit Name
8 - 15
BRG
(Baud rate divide value)
BRG (baud rate divide value)
The SIO Baud Rate Register divides the baud rate count source selected by SIO Mode Register
by (BRG set value + 1) according to the BRG set value.
In the initial state, the BRG value is indeterminate, so be sure to set the divide value before serial
I/O starts operating. The value written to the BRG during transmit/receive operation takes effect
in the next cycle after the BRG counter finished counting.
When using the internal clock (to output the SCLKO signal) in CSIO mode, the serial I/O divides
the internal BCLK using the clock divider. Next, it divides the resulting clock by (BRG set value +
1) according to the BRG set value and then by 2, which results in generating a transmit/receive
shift clock.
When using an external clock in CSIO mode, the serial I/O does not use the BRG. (Transmit/
receive operations are synchronized to the externally supplied clock.)
9
10
11
Function
Divides the baud rate count source selected
by SIO Mode Register by (n + 1) according
to the BRG set value 'n.'
(D8-D15)
12-26
12.2 Serial I/O Related Registers
12
13
BRG
SERIAL I/O
<Address: H'0080 0117>
<Address: H'0080 0127>
<Address: H'0080 0137>
<Address: H'0080 0147>
<Address: H'0080 0A17>
<Address: H'0080 0A27>
14
D15
<When reset : Indeterminate>
R
Ver.0.10
W
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