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10
Address
H'0080 07C0
H'0080 07C2
H'0080 07C4
H'0080 07C6
H'0080 07C8
H'0080 07CA
H'0080 07CC
H'0080 07CE
H'0080 07D0
H'0080 07D2
H'0080 07D4
H'0080 07D6
H'0080 07D8
H'0080 07DA
H'0080 07DC
H'0080 07DE
H'0080 0B90
H'0080 0B92
H'0080 0B94
H'0080 0B96
H'0080 0B98
H'0080 0B9A
H'0080 0B9C
H'0080 0B9E
H'0080 0BA0
H'0080 0BA2
H'0080 0BA4
H'0080 0BA6
H'0080 0BA8
H'0080 0BAA
H'0080 0BAC
H'0080 0BAE
Blank addresses are reserved.
Note 1: Prescaler Register 3 is shared with TOD0_0-7 and TID0, and TID0 Control & Prescaler 3
Enable Register is used in TID0 control.
Note 2: The registers enclosed in thick frames must always be accessed in halfwords.
Figure 10.8.3 TOD Related Register Map (2/3)
+0 Address
D0
TOD0_6 Counter (TOD06CT)
TOD0_6 Reload 1 Register (TOD06RL1)
TOD0_6 Reload 0 Register (TOD06RL0)
TID0_7 Counter (TOD07CT)
TOD0_7 Reload 1 Register (TOD07RL1)
TOD0_7 Reload 0 Register (TOD07RL0)
Prescaler Register 3 (PRS3)
TOD0 Interrupt Mask Register
(TOD0IMA)
TOD0 Control Register (TOD0CR)
TOD1_0 Counter (TOD10CT)
TOD1_0 Reload 1 Register (TOD10RL1)
TOD1_0 Reload 0 Register (TOD10RL0)
TID1_1 Counter (TOD11CT)
TOD1_1 Reload 1 Register (TOD11RL1)
TOD1_1 Reload 0 Register (TOD11RL0)
TOD1_2 Counter (TOD12CT)
TOD1_2 Reload 1 Register (TOD12RL1)
TOD1_2 Reload 0 Register (TOD12RL0)
TID1_3 Counter (TOD13CT)
TOD1_3 Reload 1 Register (TOD13RL1)
TOD1_3 Reload 0 Register (TOD13RL0)
10-178
MULTIJUNCTION TIMERS
10.8 TOD (Output-related 16-bit Timer)
+1 Address
D7
D8
TID0 Control & Prescaler 3 Enable
Register (TID0PRS3EN)
TOD0 Interrupt Status Register
(TOD0IST)
F/F Protect Register 2 (FFP2)
F/F Data Register 2 (FFD2)
TOD0 Enable Protect Register
(TOD0PRO)
TOD0 Count Enable Register
(TOD0CEN)
D15
(Note 1)
Ver.0.10
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