Table of Contents
Advertisement
19
The state transitions of the TAP controller and the basic configuration of the 32170's JTAG related
registers are shown below.
1
Test-Logic-Reset
0
Run-Test/Idle
Note : Values (0 and 1) in this diagram denote the state of JTMS input signal.
Figure 19.4.1 TAP Controller State Transition
"Shift-DR" or "Shift-IR"
"Clock-DR" or "Clock-IR"
"Update-DR" or "Update-IR"
From preceding cell
Note : Shown here is the basic configuration, and the configuration of DR and IR does not all have to be
like this.
Figure 19.4.2 Basic Configuration of JTAG Related Registers
0
1
Select-DR-Scan
1
Capture-DR
Shift-DR
Exit1-DR
Pause-DR
0
Exit2-DR
Update-DR
Input multiplexer
Data input
Test reset
1
0
0
0
1
1
0
0
1
1
1
0
0
D
Q
1
T
G
19-7
19.4 Basic Operation of JTAG
Select-IR-Scan
0
1
Capture-IR
0
Shift-IR
1
Exit1-IR
0
Pause-IR
1
0
Exit2-IR
1
Update-IR
1
0
Shift register stage
To next cell
Data output
D
Q
T
R
Parallel output stage
JTAG
1
0
1
0
Ver.0.10
Advertisement
Table of Contents
