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10
10.2.5 Output Flip-Flop Control Unit
The output flip-flop control unit controls the flip-flop (F/F) provided for each timer output. Following
flip-flop control registers are included:
• F/F Source Select Register 0 (FFS0)
• F/F Source Select Register 1 (FFS1)
• F/F Protect Register 0 (FFP0)
• F/F Protect Register 1 (FFP1)
• F/F Protect Register 2 (FFP2)
• F/F Protect Register 3 (FFP3)
• F/F Protect Register 4 (FFP4)
• F/F Data Register 0 (FFD0)
• F/F Data Register 1 (FFD1)
• F/F Data Register 2 (FFD2)
• F/F Data Register 3 (FFD3)
• F/F Data Register 4 (FFD4)
Timings at which signals are generated to the output flip-flop by each timer are shown in Table
10.2.5 below. (Note that signals are generated at different timings than those fed to the output
event bus.)
10.2 Common Units of Multijunction Timer
10-26
MULTIJUNCTION TIMERS
Ver.0.10
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