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MULTIJUNCTION TIMERS
10
10.3 TOP (Output-related 16-bit Timer)
Enabled
(by writing to enable bit
Disabled (by underflow)
or by external input)
Count clock
Enable bit
Write to
correction register
H'FFFF
H'FFFF
H'5000+H'4000
Counter
H'8000
H'5000
H'0000
H'8000
Reload register
Correction register
H'4000
Indeterminate
F/F output
Data inverted
Data inverted
by underflow
by enable
TOP interrupt
due to underflow
Note: This diagram does not show detail timing information.
Figure 10.3.12 Example of Counting in TOP Single-shot Output Mode When Count is
Corrected
10-88
Ver.0.10
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