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9
DMA2 Channel Control Register (DM2CNT)
D0
MDSEL2 TREQF2
D
Bit Name
0
MDSEL2
(Selects DMA2 transfer mode)
1
TREQF2
(DMA2 transfer request flag)
2, 3
REQSL2
(Selects cause of DMA2 request)
4
TENL2
(Enables DMA2 transfer)
5
TSZSL2
(Selects DMA2 transfer size)
6
SADSL2
(Selects DMA2 source address direction) 1 : Incremental
7
DADSL2
(Selects DMA2 destination
address direction)
W =
: Only writing a 0 is effective; when you write a 1, the previous value is retained.
1
2
3
REQSL2
Function
0 : Normal mode
1 : Ring buffer mode
0 : Not requested
1 : Requested
00 : Software start
01 : MJT (output event bus 1)
10 : MJT (TIN18 input signal)
11 : One DMA1 transfer completed
0 : Disables transfer
1 : Enables transfer
0 : 16 bits
1 : 8 bits
0 : Fixed
0 : Fixed
1 : Incremental
9-8
9.2 DMAC Related Registers
<Address: H'0080 0430>
4
5
6
TENL2
TSZSL2
SADSL2
DMAC
D7
DADSL2
<When reset : H'00>
R
W
Ver.0.10
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