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4
When EIT is accepted
When "RTE" instruction is executed
0(MSB)
PSW
0
0
Figure 4.6.1 Saving and Restoring the PC and PSW
Save SM, IE, and C bits
1
BSM
SM
BIE
IE
BC
C
Update SM, IE, and C bits
2
SM
Unchanged/0
IE
0
C
0
1
Restore BSM, BIE, and BC bits
from backup bits
SM
BSM
IE
BIE
C
BC
The values of BSM, BIE, and BC
bits after execution of the "RTE"
instruction are indeterminate.
PSW
1
2
1
7
8
0
0
0
0
0
0
0
0
0
4.6 Saving and Restoring the PC and PSW
Save PC
3
BPC
Set vector address in PC
4
PC
2
Restore PC value from BPC
The value of BPC after
execution of the "RTE"
instruction is indeterminate.
BPC
BPSW field
15
16 17
0
0
0
0
0
0
0
BSM
BIE
4-9
PC
Vector address
PC
3
4
2
PSW field
23 24 25
0
0
0
0
0
0
BC
SM
IE
EIT
31(LSB)
0
0
C
Ver.0.10
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