Mitsubishi Electric M32R Series User Manual page 115

5
SBI
Peripheral
circuits
Interrupt
request
Interrupt
request
Interrupt
request
.
.
.
.
.
.
.
Interrupt
control circuit
Interrupt
control circuit
Interrupt
control circuit
.
.
Figure 5.1.1 Block Diagram of the Interrupt Controller
System Break Interrupt
SBI Control Register
Edge-
recognized
IREQ
Edge-
recognized
IREQ
Edge-
recognized
IREQ
.
.
.
.
.
.
.
IREQ
Level-
recognized
IREQ
Level-
recognized
IREQ
Level-
recognized
5-3
INTERRUPT CONTROLLER (ICU)
5.1 Outline of the Interrupt Controller (ICU)
Interrupt controller
request generated
SBIREQ
(SBICR)
Maskable interrupt
ILEVEL
request generated
Interrupt Vector Register(
IMASK
Compar-
ed
NEW_IMASK
Interrupt Mask Register
Interrupt Control
To
SBI
the CPU
core
IVECT)
To
EI
the CPU
core
(IMASK)
Register
Ver.0.10