Mitsubishi Electric M32R Series User Manual page 610

Mitsubishi 32-bit risc single-chip microcomputers

Table of Contents

Receive enable bit

(SIO Receive

Control Register)

Receive-finished bit

Overrun error bit

SIO receive interrupt

(When receive-finished

interrupt is selected)

(When receive error

interrupt is selected)

Note 1 : Change of the Interrupt Controller "SIO Receive Interrupt Control Register" interrupt request bit

Note 2 : When receive-finished interrupt is enabled

Note 3 : When receive error interrupt is enabled

Note 4 : This is done by clearing the receive enable bit to 0.

Note 5 : The Interrupt Controller IVECT register is read or "SIO Receive Interrupt Control Register"

interrupt request bit cleared

Figure 12.7.4 Example of UART Reception (When Overrun Error Occurred)

Receive-finished interrupt

: Processing by software

12.7 Receive Operation in UART Mode

First data reception

Next data reception

Receive buffer not read

during this interval

Interrupt request accepted (Note 5)

Receive error interrupt

: Interrupt generation

Overrun error bit cleared

Interrupt request accepted (Note 5)