Interrupts - Epson S1C17F13 Technical Manual

2 POWER SUPPLY, RESET, AND CLOCKS
Transition takes place automatically by the
initial boot sequence after a request from
the reset source is canceled.
OSC1
HALT
OSC1
RUN
Figure 2.
Canceling HALT or SLEEP mode
The conditions listed below cancel HALT or SLEEP mode and put the CPU into RUN mode.
• Interrupt request from the interrupt controller
• NMI from the watchdog timer
• Debug interrupt or address misaligned interrupt
• Reset request
2.5

Interrupts

CLG has a function to generate the interrupts shown in Table 2.5.1.
Interrupt
OSC3B oscillation stabilization
waiting completion
OSC1 oscillation stabilization
waiting completion
OSC3A oscillation stabilization
waiting completion
2-12
RESET
(Initial state)
OSC3B
RUN
CLGSCLK.CLKSRC[1:0] = 0x3
OSC3A
RUN
OSC3A
HALT
4.2.1 Operating Mode-to-Mode State Transition Diagram
Table 2. 5.1 CLG Interrupt Function
Interrupt flag
CLGINTF. When the OSC3B oscillation stabilization waiting
OSC3BSTAIF operation has completed after the oscillation starts
CLGINTF. When the OSC1 oscillation stabilization waiting op-
OSC1STAIF eration has completed after the oscillation starts
CLGINTF. When the OSC3A oscillation stabilization waiting
OSC3ASTAIF operation has completed after the oscillation starts
Seiko epson Corporation
OSC3B
RUN
HALT
RUN/
HALT/
SLEEP
CLGSCLK.CLKSRC[1:0] = 0x1
EXOSC
RUN
∗ In RUN and HALT modes, the clock sources not used
as SYSCLK can be all disabled.
Set condition
slp instruction
SLEEP
Interrupt
(wake-up)
Debug interrupt
DEBUG
retd instruction
EXOSC
HALT
Clear condition
Writing 1
Writing 1
Writing 1
S1C17F13 TeChniCal Manual
(Rev. 1.0)