Program Counter Memory Indirect Preindexed Mode - Motorola MC68030 User Manual

Enhanced 32-811 microprocessor
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2.4.15 Program Counter Memory Indirect Preindexed Mode
This mode is similar to the memory indirect preindexed mode described in
2.4.10 Memory Indirect Preindexed Mode, but the PC is used as the base
register. Both the operand and operand address are in memory. The pro-
cessor calculates an intermediate indirect memory address by adding the PC
contents, a base displacement (bd), and the scaled contents of an index
register. The processor accesses a long word at that address and adds the
optional outer displacement (od) to yield the effective address. The value of
the PC is the address of the first extension word. The reference is a program
space reference and is only allowed for reads (refer to 4.2 ADDRESS SPACE
TYPES).
In the syntax for this mode, brackets enclose the values used to calculate the
intermediate memory address. All four user-specified values are optional.
However, the user must supply the assembler notation ZPC (zero value is
taken for the PC) to indicate that the PC is not used. This allows the user to
access the program space without using the PC in calculating the effective
address. Both the base and outer displacements may be null, word, or long
word. When a displacement is omitted or an element is suppressed, its value
is taken as zero in the effective address calculation.
GENERATION:
ASSEMBLER SYNTAX:
MODE:
REGISTER FiElD:
PROGRAM COUNTER:
31
BASE DISPLACEMENT:
31
INDEX REGISTER:
31
OUTER DISPLACEMENT:
EA
=
(bd + PC + Xn.SIZE 'SCAlEI + od
([bd. PC.Xn.SIZE ·SCAlE).odl
111
011
SIGN EXTENDED VALUE
SIGN EXTENDED VALUE
31
SCALE VALUE
31
31
SIGN EXTENDED VALUE
31
ADDRESS OF EXTENSION WORD
INDIRECT MEMORY ADDRESS
POINTS TO
EFFECTIVE ADDRESS:
OPERAND
NUMBER OF EXTENSION WORDS:
1. 2. 3. 4. OR 5
MOTOROLA
MC68030 USER'S MANUAL
2-19

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