Motorola MC68030 User Manual page 361

Enhanced 32-811 microprocessor
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LOGICAL ADDRESS MASK
This 8-bit field contains a mask for the LOGICAL ADDRESS BASE field.
Setting a bit in this field causes the corresponding bit of the LOGICAL
ADDRESS BASE field to be ignored. Blocks of memory larger than 16
Mbytes can be transparently translated by setting some of the logical ad-
dress mask bits to ones. Normally, the low-order bits of this field are set
to define contiguous blocks larger than 16 Mbytes, although this is not
required.
9.7.4 MMU Status Register
The MMU status register (MMUSR) is a 16-bit register that contains the status
information returned by execution of the PTEST instruction. The PTEST in-
struction searches either the ATe (PTESTwith level 0) or the translation tables
(PTEST with levels of 1-7) to determine status information about the trans-
lation of a specified logical address. The MMUSR is shown in Figure 9-38.
MOTOROLA
15
14
13
12
11
10
9
B
7
6
8 - 8US ERROR
L - LIMIT VIOLATION
S - SUPERVISOR-ONLY
W - WRITE-PROTECTED
I-INVALID
M - MODIFIED
T - TRANSPARENT ACCESS
N - NUMBER OF LEVELS
Figure 9-38. MMU Status Register (MMUSR) Format
MC68030 USER'S MANUAL
9-59

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