Motorola MC68030 User Manual page 310

•
A
PS
. EXAMPLE ADDRESS $DOA01AOO 10 0 0 0 0 0 0 0 1 0 1 0
I
0 0 0 0 0 0 0 1 1 0
I
x x x x x x x x x x
I
ROOT POINTER
$10000
$A $6
$10000 1 - 1 - - - - - 1
$10028 .... 1_...::$;.,;37.:::.;00:.:,.0_--l
$13FFC~
$14000~
$17FFC 1 - 1 - - - - - 1
$3700011-
----~
$3701~
I-'_F_AA_M_E A_D_OA_ES_S.....I
A lEVEL TABLE
14-BYTE ENTRIESI
B lEVEL TABLE $0
14-BYTE ENTRIESI
B lEVEl TABLE $OOA
14-BYTE ENTRIESI
Figure 9-5. Example Translation Tree Layout in Memory
9.1.1 Translation Control
9-8
The translation control register (TC) defines the size of pages in memory,
selects the root pointer register to be used for supervisor accesses, indicates
whether the top level of the translation tree is indexed by function code, and
specifies the number of logical address bits used to index into the various
levels of the translation tree. The initial shift (IS) field of the TC register defines
the size of the logical address space; it contains the number of most signif-
icant address bits that are ignored in the translation table lookup. For ex-
ample, if the IS field is set to zero, the logical address space is 2
32
bytes. On
the other hand, if the IS field is set to 15, the logical address space contains
only 2
32
_2
15
bytes.
MC68030 USER'S MANUAL MOTOROLA