Motorola MC68030 User Manual page 374

An aging counter can be set up in an unused field of a page descriptor. The
system can periodically check the U (used) bit for the page and increment
the count when the page has not been used since the previous check. The
system can identify the least recently used page from the counts in the aging
counter. When the counter for a page overflows, the system can list the page
in a queue of least recently used pages from which it chooses the next page
to be reallocated.
Many schemes afford the operating system designer a variety in selecting a
page to be taken. One operating system scans page tables, starting at the
lowest priority task, looking for aged pages to steal. Another system main-
tains a system-wide list of all page frames as they are used and scans the
list, starting at the oldest, to find a page to steal. A sophisticated system
keeps a working set model of active pages for each individual task. From this
information, it can swap a complete block of pages in and out with a single
I/O operation. The method chosen can have a dramatic impact on limiting
page fault overhead in a heavily used system.
9.10 AN EXAMPLE OF PAGING IMPLEMENTATION IN AN
OPERATING SYSTEM
This section describes an example operating system design that illustrates
some of the MMU features. The description suggests alternatives to provide
variations of the design. Memory management algorithms that can be im-
plemented to derive the actual code are shown. A bus error handler routine
is shown also. Implementing the algorithms develops the basic code for the
memory management services of an operating system.
9.10.1 System Description
9-72
The example system has the ability to map a large virtual memory task space,
which is required for execution of predominantly numerically intensive pro-
cessing tasks. Most of these tasks do not need more than 16 Mbytes of
memory, but the system can supply a larger virtual memory space (as large
as 496 Mbytes) to the occasional task that requires more. The system uses
the relatively large page size of 8K bytes to minimize thrashing and translation
table searches. With a larger page size, fewer descriptors can map a large
area of virtual memory. Also, in a given period of time, the MC68030 expe-
riences fewer ATC misses and performs fewer table searches. The larger
page size requires the paging liD operations to transfer larger blocks of data,
and sometimes only a small part of the page is actually used. However,
preliminary software model simulations show that 8K-byte pages provide
optimum performance for this type of processing.
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