Motorola MC68030 User Manual page 427

A coprocessor can be designed to execute a cpGEN instruction concurrently
with the execution of main processor instructions and, also, buffer one write
operation to either its command or condition CIR. This type of coprocessor
issues a null primitive with CA
=
1 when it is concurrently executing a cpGEN
instruction, and the main processor initiates another general or conditional
coprocessor instruction. This primitive indicates that the coprocessor is busy
and the main processor should read the response CIR again without reini-
tiating the instruction. The IA bit of this null primitive usually should be set
to minimize interrupt latency while the main processor is waiting for the
coprocessor to complete the general category instruction.
Table 10-3 summarizes the encodings of the null primitive.
Table 10-3. Null Coprocessor Response Primitive Encodings
CA PC IA PF TF General Instructions Conditional Instructions
x 1 x x x Pass Program Counter to Instruc- Same as General Category
tion Address CIR, Clear PC Bit, and
Proceed with Operation Specified
by CA, lA, PF, and TF Bits
1
0 0
x x
Reread Response CIR, Do Not Same as General Category
Service Pending Interrupts
1 0 1 x x Service Pending Interrupts and Same as General Category
Reread the Response CIR
0 0 0 0
c
If (Trace Pending) Reread Re- Main Processor Completes In-
sponse CIR; Else, Execute Next In- struction Execution Based on TF = c
struction
0 0 1 0 c
If (Trace Pending) Service Pending Main Processor Completes In-
Interrupts and Reread Response struction Execution Based on TF = c
CIR; Else, Execute Next Instruction
0
0
x 1 c
Coprocessor Instruction Com- Main Processor Completes In-
pleted; Service Pending Excep- struction Execution Based on
tions or Execute Next Instruction TF=c.
x = Don't Care
c= 1 or 0 Depending on Coprocessor Condition Evaluation
MOTOROLA
MC68030 USER'S MANUAL 10-39
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