Motorola MC68030 User Manual page 250

Enhanced 32-811 microprocessor
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7-88
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~
________________________________
X===:X~
____
~A3~.AO~=~10~00
________ _
~
__________________
~~~=:X~
____________ _
__
~
________________________
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r-
r
BURST ABORTED
t
INTERNAL
I
RERUN CYCLE TO GET LAST
BUS ERROR ASSERTED
PROCESSING
3 BYTES DF OPERAND
0111
1000
VALUE OF AJAO INCREMENTED BY THE SYSTEM HARDWARE
Figure 7-53. Long-Word Operand Request -- BERR on Second Access
read cycle for the second portion with CBREQ negated, as shown in Figure
7-53. If BERR is asserted again, the MC68030 then takes an exception. The
MC68030 supports late bus errors during a burst fill operation; the timing is
the same relative to STERM and the clock as for a late bus error in a normal
synchronous cycle.
MC68030 USER'S MANUAL
MOTOROLA

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