Addressing Modes - Motorola MC68030 User Manual

Enhanced 32-811 microprocessor
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A bit field operand is specified by:
1. A base address that selects one byte in memory,
2. A bit field offset that indicates the leftmost (base) bit of the bit field in
relation to the most significant bit of the base byte, and
3. A bit field width that determines how many bits to the right of the base,
bit are in the bitjield.
The most.significant bit ofthe base byte is bit field offset 0, the least significant
bit of the base byte is bit field offset 7, and the least significant bit of the
previous byte in memory is bit offset
-1. Bit field offsets may have values
in the range of - 2
31
to 2
31
-1, and bit field widths may range between 1
and 32 bits.
2.4 ADDRESSING MODES
2-8
The addressing mode of an instruction can specify the value of an operand
(with an immediate operand), a register that contains the operand (with the
register direct addressing mode), or how the effective address of an operand
in memory is derived. An assembler syntax has been defined for each ad-
dressing mode.
Figure 2-3 shows the general format ohhe single effective address instruction
operation word. The effective address field specifies the addressing mode
for an operand that can use one of the numerous defined modes. The (ea)
designation is composed of two 3-bit fields: the mode field and the register
field. The value in the mode field selects one or a set of addressing modes.
The register field specifies a register for the mode or a submode for modes
that do not use registers.
15
14
13
12
11
10
EFFECTIVE ADDRESS
MODE
REGISTER
Figure
2-3.
Single Effective Address Instruction Operation Word
Many instructions imply the addressing mode for one of the operands. The
formats of these instructions include appropriate fields for operands that use
only one addressing mode.,
MC68030 USER'S
MANUAL
'MOTOROLA

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