Table of Contents
Advertisement
Paragraph
Number
7.3.5
7.3.6
7.3.7
7.4
7.4.1
7.4.1.1
7.4.1.2
7.4.1.3
7.4.2
7.4.3
7.5
7.5.1
7.5.2
7.5.3
7.5.4
7.6
7.7
7.7.1
7.7.2
7.7.3
7.7.4
7.8
8.1
8.1.1
8.1.2
8.1.3
8.1.4
8.1.5
8.1.6
8.1.7
8.1.8
8.1.9
8.1.10
8.1.11
viii
TABLE OF CONTENTS (Continued)
Title
Page
Number
Synchronous Write Cycle................................................... 7-51
Synchronous Read-Modify-Write Cycle............................... 7-54
Burst Operation Cycles...................................................... 7-59
CPU Space Cycles................................................................... 7-68'
Interrupt Acknowledge Bus Cycles ...................................... 7-69
Interrupt Acknowledge Cycle - Terminated Normally.... 7-70
Autovector Interrupt Acknowledge Cycle ....................... 7-71
Spurious Interrupt Cycle .............................................. 7-74
Breakpoint Acknowledge Cycle ................................ ; .......... 7-74
Coprocessor Communication Cycles.. .......... .......... ........ ..... 7-74
Bus Exception Control Cycles ................................................... 7-75
Bus Errors........................................................................ 7-82
Retry Operation .................. ;; ............................................ 7-89
Halt Operation.................................................................. 7-91
Double Bus Fault .............................................................. 7-94
Bus Synchronization........................ ................. ............ .......... 7-95
Bus Arbitration....................................................................... 7-96
Bus Request..................................................................... 7-98
Bus Grant .... ...... ..... ....... ....... ..... .... ....... ... ..... ...... .... ....... ... 7-99
Bus Grant Acknowledge .................................................... 7-100
Bus Arbitration Control...................................................... 7-100
Reset Operation ...................................................................... 7-103
Section 8
Exception Processing
Exception Processing Sequence ....... : ....................................... 8-1
Reset Exception................................................................ 8-5
Bus Error Exception ............................. ; ............................ 8-7
Address Error Exception.................................................... 8-8
Instruction Trap Exception ................................................. 8-9
Illegal Instruction and Unimplemented Instruction
Exceptions..................................................................... 8-9
Privilege Violation Exception ................................. '............. 8-11
Trace Exception................................................................ 8-12
Format Error Exception ........................... ;......................... 8-14
Interrupt Exceptions .......................................................... 8-14
MMU Configuration Exception ........................................... 8-21
Breakpoint Instruction Exception ..... ; .................................. 8-22
MC68030 USER'S MANUAL
MOTOROLA
Advertisement
Chapters
Table of Contents
