Motorola MC68030 User Manual page 230

State 7
During this state, the processor negates CBREO, and the memory device
may negate CBACK. Aside from this, all other bus signals driven by the
processor remain driven. The same hold times for 5TERM and data de-
scribed for 53 apply here.
State 8
This state is identical to 54 except that CBREO is negated, indicating that
the processor cannot continue to accept more data after this. The data
latched at the end of 58 corresponds to the fourth long word of the burst.
State 9
The processor negates AS, DS, and DBEN during 59. It holds the address,
R/W,
5IZ0-5IZ1, and FCO-FC2 valid throughout 59. The same hold times
for data described for 53 apply here.
Note that the address bus of the MC68030 remains driven to a constant value
for the duration of a burst transfer operation (including the first transfer before
burst mode is entered). If an external memory system requires incrementing
of the long-word base address to supply successive long words of infor-
mation, this function must be performed by external hardware. Additionally,
in the case of burst transfers that cross a 16-byte boundary (i.e., the first long
word transferred is not located at
A3/A2
=
00), the external hardware must
correctly control the continuation or termination of the burst transfer as
desired. The burst may be terminated by negating CBACK during the transfer
of the most significant long word of the 16-byte image
(A3/A2
=
11) or may
be continued (with CBACK asserted) by providing the long word located at
A3/A2
=
00 (Le., the count sequence wraps back to zero and continues as
necessary). The MC68030 caches assume the higher order address lines
. (A4-A31) remain unchanged as the long-word accesses wrap back around
to
A3/A2=00.
7.4 CPU SPACE CYCLES
7-68
FCO-FC2 select user and supervisor program and data areas as listed in Table
4-1. The area selected by FCO-FC2
=
$7 is classified as the CPU space. The
interrupt acknowledge, breakpoint acknowledge, and coprocessor commu-
nication cycles described in the following sections utilize CPU space.
MC68030 USER'S MANUAL MOTOROLA