Motorola MC68030 User Manual page 489

The instruction-cache-case and average no-cache-case columns of the in-
struction timing tables contain four sets of numbers, three of which are
enclosed in parentheses. The outer number is the total number of clocks for
the given cache case and instruction. The first number inside the parentheses
is the number of operand read cycles performed by the instruction. The
second value inside the parentheses is the maximum number of instruction
bus cycles performed by the instruction, including all prefetches to keep the
instruction pipe filled. Because the second value is the average of the odd-
word-aligned case and the even-word-aligned case (rounded up to an integral
number of bus cycles), it is always greater than or equal to the actual number
of bus cycles (one bus cycle per two instruction prefetches). The third value
within the parentheses is the number of write cycles performed by the in-
struction. One example from the instruction timing table is:
Total Number of Clocks ____
T--I21
J
I 3 I
01
Number of Read Cycles _______
-1
Maximum Number of Instruction Access Cycles
- - - - - - - - - 1
Number of Writes Cycles _ _ _ _ _ _ _ _ _
- - - l
The total numbers of bus-activity clocks and internal clocks (not overlapped
by bus activity) of the instruction in this example are derived as follows:
(2 Reads-2 Clocks/Read)
+
(3 Instruction Accesses-2 Clocks/Access)
+
(0 Writes-2 Clocks/Write)
=
10 Clocks of Bus Activity
21 Total Clocks -10 Bus Activity Clocks
=
11 Internal Clocks
The example used here is taken from a no-cache-case 'fetch effective address'
time. The addressing mode is ([d32,B],I,d32). The same addressing mode
under the instruction-cache-case execution time entry is 18(2/0/0). For the
instruction-cache-case execution time, no instruction accesses are required
because the cache is enabled and the sequencer does not have to access
external memory for the instruction words.
The first five timing tables deal exclusively with fetching and calculating
effective addresses and immediate operands. The remaining tables are in-
struction and operation timings. Some instructions use addressing modes
that are not included in the corresponding instruction timings. These cases
refer to footnotes that indicate the additional table needed for the timing
calculation. All read and write accesses are assumed to take two clock periods.
MOTOROLA
MC68030 USER'S MANUAL 11-25