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III
11.6.2 Fetch Immediate Effective Address (fiea) (Continued)
Address Mode
FULL FORMAT EXTENSION WORD(S) (CONTINUED)
#(data).w,([d16,B],d16)
6
0
16(2/0/0)
18(2/2/0)
#(data).L,([d16,B]'d16)
8
0
18(2/0/0)
20(2/3/0)
#(data).w,([d 16,B],I,d 16)
6
0
16(2/0/0)
18(2/2/0)
#(data).L,([d16,B]'I,d16)
8
0
18(2/0/0)
20(2/3/0)
#(data).W,([d16,B],d32)
6
0
16(2/0/0)
19(2/3/0)
#(data).L,([d16,B],d32)
8
0
18(2/0/0)
21(2/3/0)
#(data).w,([d16,B],I,d32)
6
0
16(2/0/0)
19(2/3/0)
#(data).L,([d 16,B],I,d32)
8
0
18(2/0/0)
21(21310)
#(data).W,([d32,B])
6
0
18(2/0/0)
19(2/2/0)
#(data).L,([d32,B])
8
0
20(2/0/0)
21(21310)
#(data).W,([d32,B],I)
6
0
18(2/0/0)
19(2/2/0)
#(data).L,([d32,B],I)
8
0
20(2/0/0)
21(2/3/0)
#(data).W,([d32,B],d16)
6
0
20(2/0/0)
22(2/3/0)
#(data).L,([d32,B],d16)
8
0
22(2/0/0)
24(2/3/0)
#(data).W,([d32,B]'I,d 16)
6
0
20(2/0/0)
22(2/3/0)
#(data).L,([d32,B].I,d16)
8
0
22(2/0/0)
24(2/3/0)
#(data).w,([d32,B],d32)
6
0
20(2/0/0)
23(2/3/0)
#(data).L,([d32,B]'d32)
8
0
22(2/0/0)
25(2/4/0)
#(data).W,([d32,B],I,d32)
6
0
20(2/0/0)
23(2/3/0)
#(data).L,([d32,B],I,d32)
8
0
22(2/0/0)
25(2/4/0)
B
=
Base Address: 0, An, PC, Xn, An
+
Xn, PC
+
Xn. Form does not affect timing.
I
=
Index: 0, Xn
%= Total head for fetch immediate effective address timing includes the head time for the operation.
NOTE: Xn cannot be in B and I at the same time. Scaling and size of Xn do not affect timing.
11.6.3 Calculate Effective Address (cea)
11-30
The calculate effective address table indicates the number of clock periods
needed for the processor to calculate the specified effective address. Fetch
time is only included for the first level of indirection on memory indirect
addressing modes. The effective addresses are divided by their formats (refer
to 2.5 Effective Address Encoding Summary). For instruction-cache case and
for no-cache case, the total number of clock cycles is outside the parentheses.
The number of read, prefetch, and write cycles is given inside the parentheses
as (r/p/w). The read, prefetch, and write cycles are included in the total clock
cycle number.
All timing data assumes two-clock reads and writes.
MC68030 USER'S MANUAL
MOTOROLA
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