Motorola MC68030 User Manual page 444

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The MC68030 discards any instruction words that have been prefetched be-
yond the current scanPC location when this primitive is issued with DR
=
1
(transfer to main processor). The MC68030 then refills the instruction pipe
from the scanPC address in the address space indicated by the status register
S bit.
If the MC68030 is operating in the trace on change of flow mode (T1 :TO in
the status register contains 01) when the coprocessor instruction begins to
execute and if this primitive is issued with DR = 1 (from coprocessor to main
processor), the MC68030 prepares to take a trace exception. The trace ex-
ception occurs when the coprocessor signals that it has completed all pro-
cessing associated with the instruction. Changes in the trace modes due to
the transfer of the status register to main processor take effect on execution
of the next instruction.
10.4.18 Take Pre-Instruction Exception Primitive
10-56
The take pre-instruction exception primitive initiates exception processing
using a coprocessor-supplied exception vector number and the pre-instruc-
tion exception stack frame format. This primitive applies to general and con-
ditional category instructions. Figure 10-40 shows the format of the take pre-
instruction exception primitive.
15 14 13 12 11 10 9
o
o
PC 0
I
1
I
1
1 0
I
0
I
VECTOR NUMBER
Figure 10-40. Take Pre-Instruction Exception Primitive Format
The primitive uses the PC bit as previously described. Bits [0-7] contain the
exception vector number used by the main processor to initiate exception
processing.
When the main processor receives this primitive, it acknowledges the co-
processor exception request by writing an exception acknowledge mask (re-
fer to 10.3.2 Control CIR) to the control CIR. The MC68030 then proceeds with
exception processing as described in 8.1 EXCEPTION PROCESSING SE-
QUENCE. The vector number for the exception is taken from bits [0-7] of the
primitive, and the MC68030 uses the four-word stack frame format shown in
Figure 10-41.
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