Dsack Codes And Results - Motorola MC68030 User Manual

Enhanced 32-811 microprocessor
Hide thumbs Also See for MC68030:
Table of Contents

Advertisement

signals its port size (byte, word, or long word) and indicates completion of
the bus cycle to the processor through the use of the DSACKx inputs. Refer
to Table 7-1 for DSACKx encodings and assertion results.
Table 7-1. DSACK Codes and Results
DSACK1
DSACKO
Result
H
H
Insert Wait States in Current Bus Cycle
H
L
Complete Cycle -
Data Bus Port Size is 8 Bits
L
H
Complete Cycle -
Data Bus Port Size is 16 Bits
L
L
Complete Cycle -
Data Bus Port Size is 32 Bits
For example, if the processor is executing an instruction that reads a long-
word operand from a long-word aligned address, it attempts to read 32 bits
during the first bus cycle. (Refer to 7.2.2 Misaligned Operands for the case
of a word or byte address.) If the port responds that it is 32 bits wide, the
MC68030 latches all 32 bits of data and continues with the next operation. If
the port responds that it is 16 bits wide, the MC68030 latches the 16 bits of
valid data and runs another bus cycle to obtain the other 16 bits. The operation
for an 8-bit port is similar, but requires four read cycles. The addressed device
uses the DSACKx signals to indicate the port width. For instance, a 32-bit
device
a/ways
returns DSACKx for a 32-bit port (regardless of whether the
bus cycle is a byte, word, or long-word operation).
Dynamic bus sizing requires that the portion of the data bus used for a transfer
to or from a particular port size be fixed. A 32-bit port must reside on data
bus bits 0-31, a 16-bit port must reside on data bus bits 16-32, and an 8-bit
port must reside on data bus bits 24-31. This requirement minimizes the
number of bus cycles needed to transfer data to 8- and 16-bit ports and
ensures that the MC68030 correctly transfers valid data. The MC68030 always
attempts to transfer the maximum amount of data on all bus cycles; for a
long-word operation, it always assumes that the port is 32 bit wide when
beginning the bus cycle.
The bytes of operands are designated as shown in Figure 7-3. The most
significant byte of a long-word operand is OPO, and OP3 is the least significant
byte. The two bytes of a word-length operand are OP2 (most significant) and
OP3. The single byte of a byte-length operand is OP3. These designations
are used in the figures and descriptions that follow.
MOTOROLA
MC68030 USER'S MANUAL
7-7

Advertisement

Table of Contents
loading

Table of Contents