Motorola MC68030 User Manual page 588

Enhanced 32-811 microprocessor
Hide thumbs Also See for MC68030:
Table of Contents

Advertisement

Cycle,
Asynchronous Read, 7-31
Breakpoint Acknowledge, 7-74
Burst, 7-59,12-17
Coprocessor Communication, 7-74
Interrupt Acknowledge, 7-69
Interrupt Acknowledge, Autovector, 7-71
Cycles, Data Transfer, 7-30
-D-
Data, Immediate, 2-21
Data Buffer Enable Signal, 5-6, 7-5, 7-31ff
Data Burst Enable Bit, 6-21
Data
Bus, 5-4, 7-5, 7-30ff, 12-9
Activity, 12-10
Requirements, Read Cycle, 7-10
Write Enable Signals, 7-23
Cache, 1-16,6-1,6-6, 11-4, 11-16
Movement Instructions, 3-4
Port Organization, 7-8
Register Direct Mode, 2-9
Registers, 1-6,2-2
Select, Byte, 7-25
Transfer
Cycles, 7-30
Transfer Mechanism, 7-6
Types, 1-10
Data Strobe Signal, 5-6, 7-5, 7-27ff
Data Transfer and Size Acknowledge Signals, 5-6,
6-11, 6-14, 7-5,7-6, 7-26ff
DBE Bit, 6-16
DBEN Signal, 5-6, 7-5, 7-31ff
Debugging Aids, 12-35
Decoding, MMU Status Register, 9-61-9-64
Definition, Task Memory Map, 9-66
Delay, Input, 7-2
Derivation, Table Index, 9-9
Description, General, 1-1
Descriptor,
Bits, Unused, 9-71
Fetch Operation Flowchart, 9-44
Indirect,
Long Format, 9-28
Short Format, 9-26
Invalid,
Long Format, 9-28
Short Format, 9-26
Page, Early Termination,
Long Format, 9-25
Short Format, 9-25
Page,
Long Format, 9-26
Short Format, 9-26
Root Pointer, 9-23
Table,
Long Format, 9-24
Short Format, 9-24
Descriptors, Translation Table, 9-10, 9-20
DFC, 1-8, 2-4
Differences,
MC68020 Hardware, 12-3
MC68020 Software, 12-4
MMU,9-51
DMA Coprocessor, 10-5
Double Bus Fault, 7-94, 8-7
Doubly-Linked List
Deletion Example, 3-30
Insertion Example, 3-29
DR Bit, 10-36
DS Signal, 5-6, 7-5, 7-27ff
DSACKO Signal, 5-6, 6-11, 6-14, 7-5, 7-6, 7-26ff,
DSACKl Signal, 5-6, 6-11, 6-14, 7-5,7-6, 7-26ff,
Dynamic Allocation, Table, 9-40
Dynamic Bus Sizing, 7-6, 7-19, 7-24
DO-D31 Signals, 5-4, 7-5, 7-30ff
DO-D7,1-6
-E-
Early Termination, 9-23, 9-70
Early Termination Control, 12-34
ECS Signal, 5-5, 7-4, 7-26ff
ED Bit, 6-22
Effective Address Encoding Summary, 2-22
EI Bit, 6-23
Empty/Reset Format Word, 10-22
Enable Data Cache Bit, 6-22
Enable Instruction Cache Bit, 6-23
Encoding,
Address Offset, 7-9
Size Signal, 7-9
Entry, Address Translation Cache, 9-17
Errors, Bus, 7-82
EU,6-16
Example,
CAS Instruction, 3-25
CAS2 Instruction, 3-25
Contiguous Memory, 9-35
Doubly-Linked List
Deletion, 3-30
Insertion, 3-29
Function Code Lookup, 9-46
Indirection, 9-36
Linked List
Deletion, 3-27
Insertion, 3-26
Protection, Translation Tree, 9-50
System Paging Implementation, 9-72
Table Paging, 9-39
Table Sharing, 9-32
Two Task Translation Tree, 9-47
Exception,
Address Error, 8-8, 10-72
Breakpoint Instruction, 8-22
Bus Error, 8-7, 10-72
cpTRAPcc Instruction, 10-69
INDEX-4
MC68030 USER'S MANUAL
MOTOROLA

Advertisement

Table of Contents
loading

Table of Contents