Motorola MC68030 User Manual page 487

Enhanced 32-811 microprocessor
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Using the general Equation (11-2), calculate as follows:
Execution Time
= CCea1 + [CCoP1 - min(Hea1 ,ToP1)] + [CCea2 - min(Hea2,ToP1)] +
[CCoP2 - min(HoP2, Tea 2)] + [CCea3 - min( Hea 3,ToP2)] +
[CCoP3 - min(HoP3,Tea3)] + [CCea4 - min( Hea4,ToP3)] +
[CCoP4 - min(HoP4,Tea4)]
= 3 + [2 - min(O, 1 )]m + [12 - min(4,O)] +
[5- min(O,O)] + [2- min(1,3)] +
[6 - min(2,O)] + [2 - min(O,2)] +
[14- min(3,O)
=3+2+12+5+1+6+2+14
= 45 clock periods
A similar analysis can be constructed for the average no-cache case. Since
the average no-cache-case time assumes two clock periods per bus cycle
(i.e., no wait states), the timing given in the tables does not apply directly to
systems with wait states. To approximate the average no-cache-case time
for an instruction or effective address with W wait states, use the following
formula:
where:
Nec
=
Neet
+
(#
of data reads and writes)·W
+
(max.
#
of instruction accesses)·W
NeCt is the no-cache-case timing value from the appropriate table.
The number of data reads, data writes, and maximum instruction accesses
are found in the appropriate table.
The average no-cache-case timing obtained from this formula is equal to or
greater than the actual no-cache-case timing since the number of instruction
accesses used is a maximum (the values in the tables are always rounded
up) and no overlap is assumed.
MOTOROLA
MC68030 USER'S MANUAL
11-23

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