Motorola MC68030 User Manual page 360

9-58
Cache Inhibit (CI)
This bit inhibits caching for the transparent block:
o -
Caching allowed
1 - Caching inhibited
When this bit is set, the contents of a matching address are not stored in
the internal instruction or data cache. Additionally, the cache inhibit out
signal (ClOUT) is asserted when this bit is set, and a matching address is
accessed, signaling external caches to inhibit caching for those accesses.
Read/Write (R/W)
This bit defines the type of access that is transparently translated (for a
matching address):
o -
Write accesses transparent
1 - Read accesses transparent
Read/Write Mask (RWM)
This bit masks the RIW field:
o -
R/W field used
1 - R/W field ignored
When RWM is set to one,
b~th
read and write accesses of a matching
address are transparently translated. For transparent translation of read-
modify-write cycles with matching addresses, RWM must be set to one. If
the RWM bit equals zero, neither the read nor the write of any read-modify-
write cycle is transparently translated with the TTx register.
Function Code Base (FC BASE)
This 3-bit field defines the base function code for accesses to be trans-
parently translated with this register. Addresses with function codes that
match the FC BASE field (and are otherwise eligible) are transparently
translated.
Function Code Mask (FC MASK)
This 3-bit field contains a mask for the FC BASE field. Set'ting a bit in this
field causes the corresponding bit of the FC BASE field to be ignored.
LOGICAL ADDRESS BASE
This 8-bit field is compared with address bits A31-A24. Addresses that
(
match in this comparison (and are otherwise eligible) are transparently
translated.
MC68030 USER'S MANUAL
MOTOROLA