Motorola MC68030 User Manual page 280

Exception processing for privilege violations is similar to that for illegal in-
structions. When the processor identifies a privilege violation, it begins ex-
ception processing before executing the instruction. The processor copies
the status register, enters the supervisor privilege level, and clears the trace
bits. The processor generates vector number 8, the privilege violation ex-
ception vector, and saves the privilege violation vector offset, the current
program counter value, and the internal copy of the status register on the
supervisor stack. The saved value of the program counter is the logical ad-
dress of the first word of the instruction that caused the privilege violation.
Instruction execution resumes after the required prefetcnes from the address
in the privilege violation exception vector.
8.1.7 Trace Exception
8-12
To aid in program development, the M68000 processors include instruction-
by-instruction tracing capability. The MC68030 can be programmed to trace
all instructions or only instructions that change program flow. In the trace
mode, an instruction generates a trace exception after it completes execution,
allowing a debugger program to monitor execution of a program.
The T1 and TO bits in the supervisor portion of the status register control
tracing. The state of these bits when an instruction begins execution deter-
mines whether the instruction generates a trace exception after the
instruc~.
tion completes. Clearing both T bits disables tracing, and instruction execution
proceeds normally. Clearing the T1 bit and setting the TO bit causes an in-
struction that forces a change of flow to take a trace exception. Instructions
that increment the program counter normally do not take the trace exception.
Instructions that are traced in this mode include all branches, jumps, instruc-
tion traps, returns, and coprocessor instructions that modify the program
counter flow. This mode also includes status register manipulations, because
the processor must re-prefetch instruction words to fill the pipe again any
time an instruction that can modify the status register is executed. The ex-
ecution of the BKPT instruction causes a change of flow if the opcode re-
placing the BKPT is an instruction that causes a change of flow (i.e., a jump,
branch, etc.). Setting the T1 bit and clearing the TO bit causes the execution
of all instructions to force trace exceptions. Table 8-3 shows the trace mode
selected by each combination of T1 and TO.
MC68030 USER'S MANUAL
MOTOROLA