Program Counter Memory Indirect Postindexed Mode - Motorola MC68030 User Manual

Enhanced 32-811 microprocessor
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2.4.14 Program Counter Memory Indirect Postindexed Mode
2-18
This mode is similar to the memory indirect postindexed mode described in
2.4.9 Memory Indirect Postindexed Mode, but the PC is used as the base
register. 80th the operand and operand address are in memory. The pro-
cessor calculates an intermediate indirect memory address by adding a base
displacement (bd) to the PC contents. The processor accesses a long word
at that address and adds the scaled contents of the index register and the
optional outer displacement (od) to yield the effective address. The value of
the PC used in the calculation is the address of the first extension word. The
reference is a program space reference and is only allowed for reads (refer
to 4.2 ADDRESS SPACE TYPES).
In the syntax for this mode, brackets enclose the values used to calculate the
intermediate memory address. All four user-specified values are optional.
However, the user must supply the assembler notation ZPC (zero value is
taken for the PC) 'to indicate that the PC is not used. This allows the user to
access the program space without using the PC in calculating the effective
address. 80th the base and outer displacements may be null, word, or long
word. When a displacement is omitted or an element is suppressed, its value
is taken as zero in the effective address calculation.
GENERATION:
EA
=
(bd + PCI + Xn,SIZE ·SCALE + ad
ASSEMBLER SYNTAX:
([bd. PCI. Xn,SIZE ·SCALE.adl
MOOE:
111
31
REGISTER FIELD:
011
PROGRAM COUNTER:
ADDRESS OF EXTENSION WORD
31
BASE OISPLACEMENT:
SIGN EXTENOED VALUE
31
INDIRECT MEMORY ADDRESS
POINTS TO
31
31
INOEX REGISTER:
SIGN EXTENDED VALUE
SCALE VALUE
31
OUTER DISPLACEMENT:
SIGN EXTENDED VALUE
31
EFFECTIVE ADDRESS:
NUMBER OF EXTENSION WORDS:
1. 2. 3. 4. DR 5
MC68030 USER'S MANUAL
MOTOROLA

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