Motorola MC68030 User Manual page 257

7.6 BUS SYNCHRONIZATION
The MC68030 overlaps instruction execution; that is, during bus activity for
one instruction, instructions that do not use the external bus can be executed.
Due to the independent operation of the on-chip caches relative to the op-
eration of the bus controller, many subsequent instructions can be executed,
resulting in seemingly nonsequential instruction execution. When this is not
desired and the system depends on sequential execution following bus ac-
tivity, the NOP instruction can be used. The NOP instruction forces instruction
and bus synchronization in that it freezes instruction execution until all pend-
ing bus cycles have completed.
An example of the use of the NOP instruction for this purpose is the case of
a write operation of control information to an external register, where the
external hardware attempts to control program execution based on the data
that is written with the conditional assertion of BERR. If the data cache is
enabled and the write cycle results in a hit in the data cache, the cache is
updated. That data, in turn, may be used in a subsequent instruction before
the external write cycle completes. Since the MC68030 cannot process the
bus error until the end of the bus cycle, the external hardware has not suc-
cessfully interrupted program execution. To prevent a subsequent instruction
from executing until the external cycle completes, a NOP instruction can be
inserted after the instruction causing the write. In this case, bus error excep-
tion processing proceeds immediately after the write before subsequent in-
structions are executed. This is an irregular situation, and the use of the NOP
instruction for this purpose is not required by most systems.
Note that even in a system with error detection/correction
circuitry~
the NOP
is not required for this synchronization. Since the MMU always checks the
validity of write cycles before they proceed to the data cache and are executed
externally, the MC68030 is guaranteed to write correct data to the cache.
Thus, there is no danger in subsequent instructions using erroneous data
from the cache before an external bus error signals an error.
A bus synchronization example is given in Figure 7-58.
MOTOROLA MC68030 USER'S MANUAL
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