Motorola MC68030 User Manual page 149

Enhanced 32-811 microprocessor
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When a cachable read cycle provides data with both CIIN and BERR negated,
the MC68030 attempts to fill the cache entry. Figure 6-5 shows the organi-
zation of a line of data in the caches. The notation bO, b1, b2, and so forth
identifies the bytes within the line. For each entry in the line, a valid bit in
the associated tag corresponds to a long-word entry to be loaded. Since a
single valid bit applies to an entire long word, a single entry mode operation
must provide a full 32 bits of data. Ports less than 32 bits wide require several
read cycles for each entry.
Figure 6-5 shows an example of a byte data operand read cycle starting at
byte address $03 from an 8-bit port. Provided the data item is cachable, this
operation results in four bus cycles. The first cycle requested by the MC68030
reads a byte from address $03. The 8-bit DSACKx response causes the
MC68030 to fetch the remainder of the long word starting at address $00.
The bytes are latched in the following order: b3, bO, b1, and b2. Note that
during cache loading operations, devices must indicate the same port size
consistently throughout all cycles for that long-word entry in the cache.
Figure 6-6 shows the access of a byte data operand from a 16-bit port. This
operation requires two read cycles. The first cycle requests the byte at address
$03. If the device responds with a 16-bit DSACKx encoding, the word at
address $02 (including the requested byte) is accepted by the MC68030. The
second cycle requests the word at address $00. Since the device again re-
sponds with a 16-bit DSACKx encoding, the remaining two bytes of the long
word are latched, and the cache entry is filled.
$00
$04
SOB
SOC
TAG
VO-V3
I
bO
I
b
1
I
b21 b31
I I I I I I I I I I I I I I I
CYCLE
SIZE
ADDRESS
COMMENT
BYTE
$03
E1
- THIS IS THE REQUESTED OPERAND
3-BYTE
$00
I
bO
I I I
- NEXT BYTE FOR COMPLETING CACHE ENTRY
WORD
$01
ED
- NEXT BYTE FOR COMPlETING CACHE ENTRY
BYTE
$02
E1
- LAST BYTE TO COMPLETE THE LONG WORD
Figure 6-5. Single Entry Mode Operation - 8-Bit Port
MOTOROLA
MC68030 USER'S MANUAL
6-11

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