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5.6.6 Data Strobe (DS)
During a read cycle, this three-state output indicates that an external device
should place valid data on the data bus. During a write cycle, the data strobe
indicates that the MC68030 has placed valid data on the bus. During two-
clock synchronous write cycles, the MC68030 does not assert DS. Refer to
7.1.5 Data Strobe for more information about the relationship of DS to bus
operation.
5.6.7 Data Buffer Enable (DBEN)
This output is an enable signal for external data buffers. This signal may not
be required in all systems. The timing of this signal may preclude its use in
a system that supports two-clock synchronous bus cycles. Refer to 7.1.6 Data
Buffer Enable for more information about the relationship of DBEN to bus
operation.
5.6.8 Data Transfer and Size Acknowledge (DSACKO, DSACK1)
These inputs indicate the completion of a requested data transfer operation.
In addition, they indicate the size of the external bus port at the completion
of each cycle. These signals apply only to asynchronous bus cycles. Refer to
7.1.7 Bus Cycle Termination Signals for more information on these signals
and their relationship to dynamic bus sizing.
5.6.9 Synchronous Termination (STERM)
5-6
This input is a bus handshake signal indicating that the addressed port size
is 32 bits and that data is to be latched on the next falling clock edge for a
read cycle. This signal applies only to synchronous operation. Refer to 7.1.7
Bus Cycle Termination Signals for more information about the relationship
of STERM to bus operation.
MC68030 USER'S MANUAL
MOTOROLA
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