Power Domain And Module Topology - Texas Instruments AM1808 User Manual

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Table 6-8. Power and Sleep Controller (PSC) Registers (continued)
PSC0 BYTE
ADDRESS
-
-
-

6.8.1 Power Domain and Module Topology

The device includes two PSC modules.
Each PSC module controls clock states for several of the on chip modules, controllers and interconnect
components. Table 6-9
the power domain they are associated with, the LPSC assignment and the default (power-on reset)
module states. See the device-specific data manual for the peripherals available on a given device. The
module states and terminology are defined in
LPSC Module Name
Number
0 EDMA3 Channel Controller 0
1 EDMA3 Transfer Controller 0
2 EDMA3 Transfer Controller 1
3 EMIFA (Br7)
4 SPI 0
5 MMC/SD 0
6 ARM Interrupt Controller
7 ARM RAM/ROM
8 —
9 UART 0
10 SCR0 (Br 0, Br 1, Br 2, Br 8)
11 SCR1 (Br 4)
12 SCR2 (Br 3, Br 5, Br 6)
13 PRUSS
14 ARM
15 —
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PSC1 BYTE
ACRONYM
ADDRESS
0x01E2 7A74 MDCTL29
0x01E2 7A78 MDCTL30
0x01E2 7A7C MDCTL31
and Table 6-10 lists the set of peripherals/modules that are controlled by the PSC,
Table 6-9. PSC0 Default Module Configuration
Power Domain
AlwaysON (PD0)
AlwaysON (PD0)
AlwaysON (PD0)
AlwaysON (PD0)
AlwaysON (PD0)
AlwaysON (PD0)
AlwaysON (PD0)
AlwaysON (PD0)
—
AlwaysON (PD0)
AlwaysON (PD0)
AlwaysON (PD0)
AlwaysON (PD0)
AlwaysON (PD0)
AlwaysON (PD0)
—
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SPRS653E – FEBRUARY 2010 – REVISED MARCH 2014
REGISTER DESCRIPTION
Module 29 Control Register
Module 30 Control Register
Module 31 Control Register
Section 6.8.1.1.
Default Module State
SwRstDisable
SwRstDisable
SwRstDisable
SwRstDisable
SwRstDisable
SwRstDisable
SwRstDisable
Enable
—
SwRstDisable
Enable
Enable
Enable
SwRstDisable
SwRstDisable
—
Peripheral Information and Electrical Specifications
AM1808
AM1808
Auto Sleep/Wake Only
—
—
—
—
—
—
—
Yes
—
—
Yes
Yes
Yes
—
—
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