Texas Instruments AM1808 User Manual page 183

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Table 6-90. Universal Serial Bus OTG (USB0) Registers (continued)
BYTE ADDRESS ACRONYM
0x01E0 1848 RXGCR[2]
0x01E0 184C RXHPCRA[2]
0x01E0 1850 RXHPCRB[2]
0x01E0 1860 TXGCR[3]
0x01E0 1868 RXGCR[3]
0x01E0 186C RXHPCRA[3]
0x01E0 1870 RXHPCRB[3]
0x01E0 2000 DMA_SCHED_CTRL DMA Scheduler Control Register
0x01E0 2800 WORD[0]
0x01E0 2804 WORD[1]
. . . . . .
0x01E0 28FC WORD[63]
0x01E0 4000 QMGRREVID
0x01E0 4008 DIVERSION
0x01E0 4020 FDBSC0
0x01E0 4024 FDBSC1
0x01E0 4028 FDBSC2
0x01E0 402C FDBSC3
0x01E0 4080 LRAM0BASE
0x01E0 4084 LRAM0SIZE
0x01E0 4088 LRAM1BASE
0x01E0 4090 PEND0
0x01E0 4094 PEND1
0x01E0 5000 QMEMRBASE[0]
0x01E0 5004 QMEMRCTRL[0]
0x01E0 5010 QMEMRBASE[1]
0x01E0 5014 QMEMRCTRL[1]
. . . . . .
0x01E0 50F0 QMEMRBASE[15]
0x01E0 50F4 QMEMRCTRL[15]
0x01E0 600C CTRLD[0]
0x01E0 601C CTRLD[1]
. . . . . .
0x01E0 63FC CTRLD[63]
0x01E0 6800 QSTATA[0]
0x01E0 6804 QSTATB[0]
0x01E0 6808 QSTATC[0]
0x01E0 6810 QSTATA[1]
0x01E0 6814 QSTATB[1]
0x01E0 6818 QSTATC[1]
. . . . . .
0x01E0 6BF0 QSTATA[63]
0x01E0 6BF4 QSTATB[63]
0x01E0 6BF8 QSTATC[63]
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Receive Channel 2 Global Configuration Register
Receive Channel 2 Host Packet Configuration Register A
Receive Channel 2 Host Packet Configuration Register B
Transmit Channel 3 Global Configuration Register
Receive Channel 3 Global Configuration Register
Receive Channel 3 Host Packet Configuration Register A
Receive Channel 3 Host Packet Configuration Register B
DMA Scheduler Table Word 0
DMA Scheduler Table Word 1
. . .
DMA Scheduler Table Word 63
Queue Manager Registers
Queue Manager Revision Register
Queue Diversion Register
Free Descriptor/Buffer Starvation Count Register 0
Free Descriptor/Buffer Starvation Count Register 1
Free Descriptor/Buffer Starvation Count Register 2
Free Descriptor/Buffer Starvation Count Register 3
Linking RAM Region 0 Base Address Register
Linking RAM Region 0 Size Register
Linking RAM Region 1 Base Address Register
Queue Pending Register 0
Queue Pending Register 1
Memory Region 0 Base Address Register
Memory Region 0 Control Register
Memory Region 1 Base Address Register
Memory Region 1 Control Register
. . .
Memory Region 15 Base Address Register
Memory Region 15 Control Register
Queue Manager Queue 0 Control Register D
Queue Manager Queue 1 Control Register D
. . .
Queue Manager Queue 63 Status Register D
Queue Manager Queue 0 Status Register A
Queue Manager Queue 0 Status Register B
Queue Manager Queue 0 Status Register C
Queue Manager Queue 1 Status Register A
Queue Manager Queue 1 Status Register B
Queue Manager Queue 1 Status Register C
. . .
Queue Manager Queue 63 Status Register A
Queue Manager Queue 63 Status Register B
Queue Manager Queue 63 Status Register C
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SPRS653E – FEBRUARY 2010 – REVISED MARCH 2014
REGISTER DESCRIPTION
Peripheral Information and Electrical Specifications
AM1808
AM1808
183