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AM1808
SPRS653E – FEBRUARY 2010 – REVISED MARCH 2014
CHx_CLK
CHx_START
CHx_ENABLE
CHx_WAIT
CHx_DATA[n:0]
CHx_XDATA[n:0]
CHx_CLK
CHx_START
CHx_ENABLE
CHx_WAIT
CHx_DATA[n:0]
I1
CHx_XDATA[n:0]
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Peripheral Information and Electrical Specifications
12
15
16
19
17
Data1
Data2
Data3
Figure 6-71. uPP Single Data Rate (SDR) Transmit Timing
12
15
16
19
20
17
Q1
I2
Q2
I3
Q3
Figure 6-72. uPP Double Data Rate (DDR) Transmit Timing
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13
20
Data4
Data5
13
I4
Q4
I5
Q5
Copyright © 2010–2014, Texas Instruments Incorporated
AM1808
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Data6
Data7
Data8
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18
I6
Q6
I7
Q7
I8
Q8
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Data9
I9
Q9
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